The global semiconductor industry has long been dominated by a narrow concentration of international manufacturers, creating significant strategic vulnerabilities for regions dependent on foreign technology. To counter this reliance, the European Union has actively funded ambitious alternatives designed to secure its technological future. A primary example of this effort is the recent successful launch of the Rhea1 CPU, a high-performance processor developed under the European Processor Initiative. The University of Zagreb Faculty of Electrical Engineering and Computing, located in Croatia, has played a critical role in this achievement, contributing specialized expertise to the design and verification phases of the chip. This article examines the technical specifications of the Rhea1 processor, the strategic goals of the European Processor Initiative, and the specific contributions made by Croatian researchers to advance European digital sovereignty.
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Technical Specifications of the Rhea1 CPU
Modern high-performance computing (HPC) requires processors capable of handling massive parallel workloads, particularly for artificial intelligence (AI) training and complex scientific simulations. The Rhea1 CPU meets these demands through an architecture built for efficiency and scale. The processor features 80 cores, allowing it to execute numerous simultaneous threads. This multi-core design is essential for supercomputing environments where tasks are divided across thousands of processors.
Beyond its core count, the Rhea1 CPU contains over 61 billion transistors. This high transistor density reflects the immense complexity of the chip and its advanced manufacturing node. Furthermore, the processor integrates 64 GiB of Built-in High Bandwidth Memory (HBM). Traditional memory architectures often create bottlenecks, limiting the speed at which processors can access data. By embedding high bandwidth memory directly into the chip package, the Rhea1 CPU drastically reduces latency and maximizes data throughput, a critical requirement for data-intensive AI operations and exascale computing.
The Strategic Goals of the European Processor Initiative
The European Processor Initiative (EPI) is a collaborative research project involving numerous universities, research centers, and industrial partners across Europe. Its primary objective is to design and implement a family of low-power microprocessors that ensure European technological independence. The initiative focuses on two main processor lines: a general-purpose processor (like Rhea1) for supercomputing and an accelerator for AI applications.
By developing these technologies domestically, the EU aims to reduce its reliance on proprietary technologies from other continents. Controlling the foundational hardware of its computing infrastructure allows Europe to implement stricter security protocols, optimize processors for specific regional scientific priorities, and retain economic value within its internal market. The EPI represents a concerted effort to build a self-sustaining ecosystem for microprocessor design, from initial architecture to final deployment in data centers.
Design and Verification Contributions from the University of Zagreb Faculty of Electrical Engineering and Computing
Creating a modern processor with 61 billion transistors requires rigorous, methodical engineering. Hardware verification—the process of ensuring the chip’s physical design perfectly matches its logical specification—is one of the most resource-intensive phases of semiconductor development. Detecting a design flaw after a chip has been manufactured can cost millions of dollars and delay projects by months.
The University of Zagreb Faculty of Electrical Engineering and Computing provided essential support in this exact area. A specialized research team from the institution, operating within the HPC Architecture and Application Research Center, was part of a select group of experts responsible for the design and verification of the Rhea1 processor. Led by Professor Mario Kovač, this team applied advanced verification methodologies to validate the processor’s architecture before manufacturing. Their involvement places the University of Zagreb Faculty of Electrical Engineering and Computing among a rare group of academic institutions globally that possess the practical capability to contribute to silicon of this magnitude and strategic importance.
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The Role of the HPC Architecture and Application Research Center
The HPC Architecture and Application Research Center at the University of Zagreb serves as a hub for advanced computing research in Croatia. By participating in the European Processor Initiative, the center provides its researchers and students with direct exposure to cutting-edge semiconductor design. This hands-on involvement with the Rhea1 CPU accelerates the transfer of knowledge from theoretical academic study to practical, industrial-scale engineering, directly benefiting the local tech sector in Croatia.
Deployment in Exascale Supercomputers: Jupiter and Alice Recoque
The ultimate test of a high-performance processor is its deployment in real-world supercomputing environments. The Rhea1 CPU is scheduled for implementation in two of the first European exascale supercomputers: Jupiter and Alice Recoque. An exascale computer is capable of performing at least one billion billion (10^18) calculations per second, representing the current frontier of computational capability.
Jupiter, hosted in Germany, and Alice Recoque, hosted in France, will utilize the Rhea1 CPU to drive scientific breakthroughs. These systems will be applied to complex societal challenges, including climate modeling, genomics, drug discovery, and materials science. By powering these systems, the Rhea1 CPU ensures that European researchers have access to homegrown hardware tailored to their specific computational needs, rather than relying on generalized commercial off-the-shelf components.
Defining Digital Sovereignty in Modern Computing
Digital sovereignty refers to the ability of a political entity, such as the European Union, to govern the digital infrastructure, data, and hardware that its economy and society depend upon. In the context of microprocessors, digital sovereignty means possessing the domestic capability to design, manufacture, and supply the critical chips that run government systems, telecommunications networks, and scientific research facilities.
The development of the Rhea1 CPU is a direct, tangible step toward achieving this sovereignty. Supply chain disruptions and geopolitical tensions have highlighted the risks of depending on a monopolized global semiconductor supply chain. By establishing a native processor architecture through the European Processor Initiative, Europe builds resilience against external pressures. The Rhea1 CPU proves that European engineering can compete at the highest levels of hardware design, securing the continent’s digital infrastructure for the long term.
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Cultivating Hardware Engineering Talent in Croatia
Participation in projects like the Rhea1 CPU has a profound impact on the local engineering ecosystem in Croatia. When students and researchers at the University of Zagreb Faculty of Electrical Engineering and Computing work on leading-edge technologies, they develop highly specialized skills that are in demand globally. This helps reverse brain drain by creating challenging, world-class opportunities within the country.
Furthermore, the visibility gained from contributing to the European Processor Initiative strengthens partnerships between the university and international tech companies. It establishes Croatia as a viable destination for advanced hardware R&D, attracting investment and fostering a local startup ecosystem focused on semiconductor design, AI acceleration, and high-performance computing.
The Future of the Rhea Architecture
The successful bring-up of the Rhea1 CPU marks the beginning, not the end, of this architectural line. The research team at the University of Zagreb Faculty of Electrical Engineering and Computing will continue to participate in developing future generations of European microprocessors based on the Rhea architecture. Subsequent iterations will likely focus on increased core counts, improved energy efficiency, and enhanced AI acceleration capabilities to keep pace with the rapid evolution of machine learning workloads.
As the European Processor Initiative moves forward, the foundational work completed on the Rhea1 CPU will inform the design of next-generation chips. The continuous involvement of academic partners ensures that the pipeline of engineering talent remains robust, securing the future of European digital sovereignty for decades to come.
Conclusion
The successful launch of the Rhea1 CPU represents a pivotal moment for the European semiconductor industry. With 80 cores, over 61 billion transistors, and 64 GiB of high bandwidth memory, the processor meets the rigorous demands of modern exascale supercomputing. The European Processor Initiative has demonstrated that a collaborative, pan-European approach can successfully produce sovereign hardware. The critical design and verification contributions from the University of Zagreb Faculty of Electrical Engineering and Computing highlight the strength of Croatia’s academic institutions in the global tech arena. As the Rhea1 CPU powers supercomputers like Jupiter and Alice Recoque, it lays a secure, sovereign foundation for Europe’s scientific and industrial future.
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